[Marvell]Staff ASIC Verification Engineer上海北京火热招聘!

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Job Title: Staff ASIC Verification Engineer
Location: Shanghai
Department: Datastorage IC R&D

Responsibility:
Work together with algorithm team and design team to develop testplan and testcase for various blocks in our Read Channel products.
Maintain and help improve our UVM based verification environment.
Guide junior verification engineers to improve our verification coverage and reduce number of tape out.
Research on some advanced verification technology such as assertion based formal verification.
   
Requirement:
Major in EE, CS or related, Master Degree with 5+ years or Bachelor with 8+ years working experiences in ASIC verification.
Familiar with System-Verilog and UVM verification methodology
Familiar with script languages(perl,tcl,sh etc.) is a plus
Familiar with digital signal processing knowledge is a plus
Good problem solving and communication skills
Good written and spoken English. Be able to work together with global team.