【阿尔卡特朗讯中国区招聘】集成测试工程师

Manpower388

Integration & Verification Engineer（Test Development & Automation）

Location: Shanghai

Description

Test Engineers are members of the Product I & V team responsible for testing train signaling products. They review product documentation, define automation plan, design and perform automation test.

Responsibilities

1.   Coordinating with Individual Developers and with Verification lead on the design and development of automation test plans.

2.   Designing automation test bed, developing test tools and writing automation test scripts.

3.   Developing & optimizing Unit/Integration test framework.

4.   Provide mentoring, training, supporting to the developers and team members on UT & test automation.

Requirements

1.   1-2 years C/C++ development experience.

2.    Master degree in signaling/information/computer systems is required.

3.    Master at least one of following language: TCL, Ruby, Perl, Python or VBsript language.

4.    Experience in embedded system is preferred.

5.    Oracle Database Administration skill is preferred.

6.    Familiar with basic networking fundamentals (TCP/IP, routing knowledge a plus).

7.    Good written and verbal communication skills in English.

8.    Highly motivated and ready to work in a fast paced environment.

9.    Must have excellent attention to detail and good problem-solving skills.

If you are interest in this position, send your CV with the subject of "Position +Name " to the following e-mail address: snow.fang@alcatel-sbell.com.cn, Please paste your CV in the e-mail body.
如果对该职位感兴趣，请将简历发送至: snow.fang@alcatel-sbell.com.cn，邮件标题格式为“职位+姓名。”，请直接将简历内容粘贴在邮件正文中。【请注明消息来源51testing】

Integration & Verification Engineer（Hardware）

Location: Shanghai

Description

Test Engineers are members of the Product Integration & Verification team responsible for testing ATCVP products. They review product documentation, write test cases, build up auto-system setup and perform manual/Auto test execution. They will assist developers to isolate and debug product defects. This position works closely with individual developers, I&V Leads, and the Product Test Manager to ensure delivering the highest quality products.

Responsibilities

1.   Coordinating with Individual Developers and with Integration & Verification lead on the design and development of test plans.

2.   Perform product test strategy, test solution. Designing Test Bed ,
Test Specifications and Test Cases on integration test.

3.   Perform manual test execution. This entails following the manual procedures in the test plan to exercise various components of the product, determining minimal steps necessary to reproduce product defects, reporting defects in our defect tracking system, and verifying defect fixes.

4.    Review product documentation. This entails reading draft versions of the product documentation and providing feedback to the technical writers. Complex tasks often require demonstrating the task to a deployment writer.

Requirements

1.   Testing experience with a minimum 1+ years of hardware testing or integration test experience. Major in Signaling is a plus.

2.   Master Degree in computers/Telecommunication/Signaling required.

3.   Experience on HW/SW Board level testing and interface verification.

4.   Have experience in ISE and VHDL/Verilog language is preferred.

5.   Have experience in CPLD/FPGA develop is preferred.

6.   Familiar with PCB tools, such as Protel, Mentor, Cadence, or other PCB tools.

7.   Experience in C, C++ development is a strong plus.

8.   Excellent written and verbal communication skills

9.   Must have excellent attention to detail and good problem-solving skills

10.  Highly motivated and ready to work in a fast paced environment.

If you are interest in this position, send your CV with the subject of "Position +Name " to the following e-mail address: snow.fang@alcatel-sbell.com.cn, Please paste your CV in the e-mail body.
如果对该职位感兴趣，请将简历发送至: snow.fang@alcatel-sbell.com.cn，邮件标题格式为“职位+姓名。”，请直接将简历内容粘贴在邮件正文中。【请注明消息来源51testing】